HMC7044LP10BETR

• Clock Synthesiser and Jitter Attenuator with Integrated PLL
• 14 Clock Outputs
• Operates Up to 3.2 Gigahertz
• SPI Configuration Interface
• 3.135V to 3.465V supply, 586mA Nominal Supply Current
• 68-Pin LFCSP package, -40°C to 85°C Operating Range

The Analog Devices HMC7044LP10BETR is a high-performance clock synthesiser and jitter attenuator with 14 outputs, in a 68-pin LFCSP package. A jitter cleaner locks onto a noisy input clock and regenerates it from a low-noise internal oscillator, so downstream converters see a far cleaner timing edge than the one that arrived. The HMC7044LP10BETR operates up to 3.2 gigahertz, runs from a 3.135V to 3.465V supply drawing 586mA nominal, and is configured over an SPI interface. It is specified from -40°C to 85°C and is listed as containing lead and RoHS non-compliant.

Multi-output jitter-cleaning clock generators distribute timing across data converter subsystems, where clock noise directly limits the signal-to-noise ratio a high-speed ADC can achieve. Typical homes are software-defined radio and phased-array radar boards, wireless base station transceivers, test and measurement instruments, and high-speed data acquisition cards. Fourteen outputs allow one device to clock several converters and their serialised data links in lockstep. Buyers should note the RoHS non-compliant and lead-bearing listings before specifying it for regulated markets.