TPS51200DRCR
- Description
- DDR/DDR2/DDR3/DDR3L/LPDDR3/DDR4 Termination Regulator 3A 2.375V to 3.5V 10-Pin VSON T/R
- Accuracy
- 5%
- Quiescent Current
- 500µA
- Output Voltage
- 3.5V
- Max Output Current
- 3A
- Datasheet
Quantity
102,000 AvailableLet us do the sourcing. Even if it's not available now, our team can track it down and tailor a solution just for you.
- DDR through DDR4 termination regulator
- 3A sink and source output current
- Buffered VTT reference output
- 2.3V to 3.5V input supply
- 10-pin VSON package
- -40°C to 85°C operating range
The Texas Instruments TPS51200DRCR is a DDR termination regulator supporting DDR, DDR2, DDR3, DDR3L, LPDDR3, and DDR4 memory. It sinks and sources up to 3A to terminate the memory bus and provides a buffered reference output, operating from a 2.3V to 3.5V input in a 10-pin VSON package. The regulator output tracks half the DDQ supply for proper VTT termination.
This regulator is used to generate the VTT termination rail and VTTREF reference for DDR memory buses on motherboards and embedded systems. Its sink-and-source capability maintains signal integrity on high-speed memory lines. Typical uses include servers, networking gear, and computing boards with DDR memory.
Fusion’s in-house quality hubs and Prosemi testing facility are fully certified to meet critical industry standards for electronic component inspection and testing.
Quantity
102,000 AvailableLet us do the sourcing. Even if it's not available now, our team can track it down and tailor a solution just for you.